68xx cross assembler
I've gotten quite a few questions now about my assembler and workflow for the MC3. I've used the same old 6800/01/04/05/09/11 assembler for years. I think it's made by E J Rupp originally. It's very basic and does not handle macros and such but it's clean and I do have the source code and have made a few modifications over the years. Mainly adding a version (as1h) that supports the very useful XGDX opcode for 6301/6303. The output is Motorola S-record (S19) that is directly compatible with most monitors and PROM programmers. Below is an archive of the assembler with both source and Linux binaries. Download assembler source and binaries I have included a build script (build.sh) for compiling under GCC. Assemble and generate s19-file $ as1h program.asm Assemble and generate listing + s19 $ as1h program.asm -L > program.lst As for assembler editor I use Emacs all the way. It handles 68xx assembly nicely.
MC3 monitor 1.4.1
This is a minor bug-fix release of the 1.4 monitor improving stability of the the single step function and improves stack handling and coherency in printout. This is the correct single step code. Silly me forgot to clear the interrupt mask on stack before RTI. *************** * DO SINGLE STEP SSTEP JSR PCRLF STEP LDS SP RESTORE PROGRAM STACK POINTER TSX LDAA ,X LOAD CC ANDA #$EF CLEAR INTERUPT MASK BIT STAA ,X SAVE CC LDAB #$1F STPWAI DECB WAIT FOR EVENTUAL SCI XFER CMPB #$00 BEFORE TIMER INIT BNE STPWAI LDX #STOP SET INTERRUPT VECTOR STX TMOFVEC+1 LDX #$FFED RESET COUNTER VALUE STX COUNTHI LDX TIMECON CLEAR INTERRUPT BIT IN TIMER CTRL REG LDAA #$04 ENABLE TIMER OVERFLOW INTERRUPT STAA TIMECON RTI *************** * SINGLE STEP INTERRUPT ENTRY STOP STS SP SAVE PROGRAM STACK POINTER LDX #INTSEQ RESTORE INTERRUPT VECTOR STX TMOFVEC+1 LDX TIMECON CLEARS INTERRUPT BIT IN TIMER CTRL REG LDAA #$00 DISABLE TIMER INTERRUPT STAA TIMECON LDX SP EXTRACT PROGRAM STOP ADDRESS LDAB #6 ABX LDX ,X CPX #$C000 BHI STEP NO STOP IN ROM STX XTEMP LDAB XTEMP CMPB #$7F BEQ STEP NO STOP IN PAGE $7F LDX #STOPTX JSR PDATA JMP PRTREG PRINT REGS AND GO TO PROMPT Monitor 1.4.1 ($C000-$C7E8) - source - listing - s19
Buffered I²C interface
I²C is a fun protocol. It's great for interfacing to real time clocks, sensors, displays etc. My personal favorite right now is the Si5351 frequency generator chip. In a world of ever increasing number of I²C compatible micro-controllers, I though that my MC3 should learn to speak I²C as well. I have chosen a chip from Philips that is a self-contained I²C interface. It's much faster than bit-banging an I/O port. The chip, PCF8584, can still be obtained from various suppliers but I don't think it's being manufactured anymore. Therefore I have taken extra care to protect it. The interface schematic can be seen below. The tricky part about buffering I²C signals is that they are bi-directional (the PCF8584 can work as both master and slave). A buffer that is both bi-directional and has open collector input/outputs needs some extra thinking. It is not possible to just put to buffers back to back and expect it to work. As soon as one of the buffers trigger the opposite buffer will also trigger and the circuit will enter a locked state. To solve this I have designed the buffer stages using two comparators (LM339) with open collector outputs. By using comparators it is possible to carefully adjust the trigger levels so that one buffer does not affect the buffer in opposite direction. A reference voltage of 0.65V is used for the comparators, but the output from the comparators facing the PCF8584 has a series resistor that together with the pull-up resistor creates a voltage divider. When the comparator tries to pull the line low the divider will limit the voltage to around 1.2V, enough for the PCF8584 to register a 'low' level but not enough to trigger the opposite comparator. This is the finished MC3 I/O board. I added an 8-pin socket (not in the schematic) for connecting EEPROMs directly on the board. As always, don't forget to add 100nF decoupling capacitors across the supply on all chips. Sample program for testing the interface This program interfaces to a DS1307 RTC chip but I have made the I²C driver routines generic so they can be used for accessing any other I²C device as well. - source - listing - s19
The Versatile Interface Adapter
Even though the MC3 is in its core a Motorola 68xx design it can use 65xx parts. The bus and timings are the same. I initially planed on building an I/O board around the 6321 PIA but ended up trying out the feature packed 6522 VIA instead. The 6522 is actually still being manufactured by WDC! The 6522 is familiar to anyone working with the 6502 or MOS/Commodore machines. In general it's a souped up 6821 with two timers and a shift register. The 6522 consumes more address space than the 6821 but each register can be directly addressed, thus making it faster for certain tasks. It requires four address pins instead of only two but for me that's a perfect match since my I/O boards each have 4 address lines making it a 1:1 match. Connecting the 6522 to the MC3 20-pin I/O expansion bus require no extra circuitry. It's only a matter of connecting the corresponding pins together. Since there is no IRQ line on the I/O bus I will have to settle for polling the 6522. Thank you Douglas Beattie for sharing your Eagle 65xx library. The 40-pin chip is a tight fit on the small 20-pin I/O board but it worked. For now there are no connectors for the 6522 ports. Not much space left but I should be able to mount a suitable connector at the top of the board. I really like how the 6522 engineers have separated the bus pins and the I/O pins to different sides of the chip.

Inside the 6522

Above is the block diagram as seen in the G65SC22 datasheet. The 6522 has two 8-bit ports with two handshake lines each. Both ports are controlled by their corresponding data register and data direction register (just like the 6821 and many other designs based on the same concept). It also has two 16-bit timers and a shift register. Care must be taken to avoid the infamous shift register bug happening in mode 011, external clocking of the shift register. The bug occurs when the shift register clock input falls at about the same time as the Φ2 clock falls, making the shift register lose one data bit. Very strange framing errors can occur when it happens. Garth Wilson has proposed a neat solution for this that involves an external latch. Rumors has it that some variants of the 6522 does not suffer from this bug. I have a used the G65SC22 from CMD in my design that supposedly have this bug fixed. I need to set up a test to see if this is the case. In general, when dealing with the 6522 you have to assume all of them contains the bug in mode 011. The other shift register modes are unaffected as far as I know.
A bigger case for the MC3
The MC3 had expanded way beyond the initial enclosure and really needed to move into something bigger. Having exposed boards feels risky. Especially with these scarce old components. I really do not want to accidentally kill anything. Also I did not want to just put everything in a standard boring electronic box. The all CMOS based MC3 does not generate much heat so active cooling is not needed but a well ventilated case also ables for some peeking inside which is fun. Isolation to reduce RFI and protect from ESD was also added to the requirement specification. It looked like I would need to design something from scratch. Old wooden TV-sets have always fascinated me. Dad worked as a TV repairman many years ago and as a kid I remember watching him working with those old wooden TV's. That's my inspiration for the MC3 enclosure. Time to warm up the Festools and get cutting! First off I decided to use edge glued oak as the base for the enclosure. It makes it all pretty robust and also look a bit more furniture-ish. The construction is a plain wooden frame with perforated side panels of aluminum. Those panels are actually ventilated sides made for Schroff 19" enclosures that I found in the scrap pile at work. Oak does not provide any ESD protection or RFI isolation to speak of so I dressed the inside of the wooden parts with aluminum tape. The front side of the box has no buttons for a clean look. Since I use the RS-232 reset circuit I very rarely need to access the physical reset switch anyway. On the back there is a cut-out in the wood for an access panel containing all connectors and buttons. A view of the back panel. Some space left for expansion. Both aluminum side panels can be removed. The main boards are stacked and screwed to the bottom with screws that go all the way through. Even when the aluminum sides are on it's possible to get a glimpse of what's inside. Also visible here is the aluminum tape on the wooden parts. Boards mounted here are from top to bottom; I/O expansion board with a few mini I/O boards on top, video board, CPU board and extended RAM board. The two boards on the bottom are empty for further expansion. Now it feels safe to let the cat stroll around the computer again!
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